1. Field of the Invention
The present invention relates to a method of implementing timing engineering change order (ECO), more particularly to a method of implementing timing ECO that takes into consideration smoothness of circuit paths.
2. Description of the Related Art
Since complexity in modern integrated circuit (IC) design has grown rapidly, some design failures that are hard to be detected may not be found until later stages of IC design, such as, after circuit layout, or even after chip fabrication. In order to correct the late-found design failures, it has become a trend for a current IC design house to not trace the failure back to early stages, and to adopt the metal-only engineering change order instead. The reason is that, in relevant researches, photomasks for a transistor layer is much more expensive than photomasks for a metal layer. Therefore, adopting metal-only ECO and maintaining the photomasks for the transistor layer unchanged is a cost saving way for failure correction.
To facilitate metal-only ECO, a placement tool is adopted to insert spare cells in a circuit. Once a design failure is detected, by selecting and rewiring appropriate spare cells, the design failure may be corrected. Typically, a circuit design is usually required to undergo many ECO runs. Therefore, how to save spare cells during the ECO runs is an important issue.
ECO may be classified into functional ECO and timing ECO. The functional ECO is used to correct functional errors and/or revise specification. The timing ECO is used to remedy signal imperfection and fix timing violations by gate sizing and/or buffer insertion.
In general, slack or delay of a gate is used to measure timing criticality of the gate. However, neither the slack nor the delay can reflect the timing criticality well, such that the timing violation may not be fixed effectively. For this reason, how to develop a method of implementing timing ECO, which is capable of determining timing criticality of gates precisely and fixing timing violation with less spare cells, is an object of the present invention.